Researcher: | Yoshio Miki |
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Advisor: | Edward A. Lee |
Sponsors: | Hitachi Ltd. and the Ptolemy Project |
This project is focusing on a control logic generation for a pipelined design. It uses the SDF (synchronous dataflow) and DE (discrete event) domains in Ptolemy to develop a high-level design methodology for high-performance systems. To reduce the cycle time between architecture design in SDF and estimation in DE, our algorithm generates control logic in the DE domain that avoids resource and data hazards. Designers can concentrate on system-level issues in the SDF domain.
The algorithm begins by generating transfer logic corresponding to each pipeline stage. Next, it generates supervisory controls that avoid hazards. This style of behavior-level logic synthesis has been shown to be implementable as sequential logic [4]. In our procedure, hazards are detected using a trace procedure on a data flow graph. Control logic for data hazards is generated as arbitration logic in adjacent functional blocks. This means the resource hazards can be detected from the static topological relations of the data flow graph. To detect data hazards, our algorithm checks all blocks in a directed loop.
A prototype implementation uses the scripting interface to Ptolemy (ptcl), translating system specifications from one form to another. We are planning to extend scripting language itself to enable a higher level interface.