| Researchers: | Bilung Lee |
|---|---|
| Wan-Teh Chang | |
| Advisor: | Edward A. Lee |
| Sponsor: |
The finite-state machine (FSM) is an intuitive computational model for specifying control flow. In large systems, however, the control functionality can become so complex that the flat, sequential FSM model becomes impractical. Hierarchical state machine models such as Statecharts [1] and specialized synchronous programming languages such as Esterel [2] extend the basic FSM model with hierarchy and concurrency in order to handle the complexity of large controllers.
The goal of this project is to introduce control flow capabilities based on hierarchical state machines into Ptolemy, and to understand formally the interaction semantics between the hierarchical state machines and Ptolemy's dataflow domains. We have created a preliminary implementation of this mixed model in Ptolemy. Systems can be built by hierarchically nesting FSMs and concurrency models. The synchronous dataflow model is particularly attractive because when it is combined hiearchically with FSMs, the combination is far more expressive than either SDF or FSMs alone, yet the resulting system remains finite state, so verification, synthesis, and optimization problems all remain decidable. The next step is to add the capability to generate code from such systems.
Some possible applications include the simulation and rapid prototyping of software systems such as telecommunications control software, and the synthesis of embedded signal processing systems.