1996 Research Summaries for the Ptolemy Project

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Code Generation for Heterogeneous Multiprocessors

Researcher:José Luis Pino
Advisor:Edward A. Lee
Sponsors:AT&T Bell Labs Fellowship, ARPA(RASSP) F33615-93-C-1317 and the Ptolemy Project
Today, programming of signal processing algorithms on embedded digital signal processors is done in assembly language and scheduled by hand. If the processor configuration changes, the code must be redesigned. If the processors themselves change, the code must be completely rewritten. In this project, we are interested in rapid prototyping of signal processing applications. We have developed a code generation framework for heterogeneous multiprocessor DSP systems from a high-level block diagram specification [1]. Code generation requires partitioning and scheduling of the algorithm onto the multiprocessor architecture. Subsequently, the algorithm code is generated in the appropriate languages.

The algorithm is specified using multiple independent dataflow graphs as described in [2]. The independent graphs communicate over nondeterminate communication links. These links do not introduce data dependencies among the independent graphs. We have found that this communication mechanism is ideal for specifying run-time controls and displays for real-time signal processing applications.

An illustration of the use of such multiple dataflow graphs is shown in figure 1. Here we have the top-level specification of an FM music synthesis algorithm. This application has been targeted to a heterogeneous platform consisting of a Unix workstation and a Motorola 56001 DSP board. In this example, there are five independent dataflow graphs communicating over five nondeterminate links. The C and Tcl/Tk code is generated for the Unix workstation; Motorola 56001 assembly code is generated for the DSP board. The user interface, shown in figure 2, is generated from the user specification.

  1. J. L. Pino, S. Ha, E. A. Lee, and J. T. Buck, ``Software Synthesis for DSP Using Ptolemy,'' to appear in Journal of VLSI Signal Processing, special issue on Synthesis for DSP, vol. 9, no. 1, 1995.
  2. J. L. Pino, T. M. Parks and E. A. Lee, ``Mapping Multiple Independent Synchronous Dataflow Graphs onto Heterogeneous Multiprocessors,'' Proceedings of the IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, November 1994.
Send comments to José Luis Pino at pino@eecs.berkeley.edu.