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Hierarchical Static Scheduling of Dataflow Graphs onto Multiple Processors

References


[1] J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, "Ptolemy: A framework for simulating and prototyping heterogeneous systems," International Journal of Computer Simulation, special issue on Simulation Software Development, vol. 4, pp. 155-182, 1994.

[2] J. L. Pino, S. Ha, E. A. Lee, and J. T. Buck, "Software synthesis for DSP using Ptolemy," Journal of VLSI Signal Processing to appear in special issue on Synthesis for DSP, 1993.

[3] E. A. Lee and S. Ha, "Scheduling strategies for multiprocessor real-time DSP," presented at IEEE Global Telecommunications Conference and Exhibition. Communications Technology for the 1990s and Beyond, Dallas, TX, USA, 1989.

[4] D. G. Powell, E. A.Lee, and W. C. Newman, "Direct synthesis of optimized DSP assembly code from signal flow block diagrams," presented at IEEE International Conference on Acoustics, Speech, and Signal Processing, San Francisco, CA, 1992.

[5] S. Ritz, M. Pankert, and H. Meyr, "High level software synthesis for signal processing systems," presented at International Conference on Application Specific Array Processors, Berkeley, CA, USA, 1992.

[6] E. A. Lee and D. G. Messerschmitt, "Synchronous data flow," Proceedings of the IEEE, vol. 75, pp. 1235-1245, 1987.

[7] J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, "Multirate signal processing in Ptolemy," presented at IEEE International Conference on Acoustics, Speech, and Signal Processing, Toronto, Ont., Canada, 1991.

[8] M. R. Garey and D. S. Johnson, Computers and Intractability: A guide to the theory of NP-completeness. New York: W.H. Freeman, 1991.

[9] A. Gerasoulis and T. Yang, "A comparison of clustering heuristics for scheduling directed acyclic graphs on multiprocessors," Journal of Parallel and Distributed Computing, vol. 16, pp. 276-291, 1992.

[10] P. D. Hoang and J. M. Rabaey, "Scheduling of DSP programs onto multiprocessors for maximum throughput," IEEE Transactions on Signal Processing, vol. 41, pp. 2225-2235, 1993.

[11] S. J. Kim and J. C. Browne, "A general approach to mapping of parallel computations upon multiprocessor architectures," presented at International Conference on Parallel Processing, University Park, PA, USA, 1988.

[12] G. C. Sih and E. A. Lee, "Declustering: A new multiprocessor scheduling technique," IEEE Transactions on Parallel and Distributed Systems, 1992.

[13] S. S. Bhattacharyya, J. T. Buck, S. Ha, and E. A. Lee, "A compiler scheduling framework for minimizing memory requirements of multirate DSP systems represented as dataflow graphs," University of California at Berkeley UCB/ERL M93/31, April 25, 1993 1993.

[14] J. L. Pino, T. M. Parks, and E. A. Lee, "Automatic code generation for heterogeneous multiprocessors," presented at IEEE International Conference on Acoustics, Speech, and Signal Processing, Adelaide, South Australia, 1994.

[15] E. A. Lee and D. G. Messerschmitt, Digital Communication, 2nd ed. Boston: Kluwer Academic Publishers, 1994.

[16] J. L. Pino, T. M. Parks, and E. A. Lee, "Mapping multiple independent synchronous dataflow graphs onto heterogeneous multiprocessors," presented at IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, 1994.

[17] G. Bilsen, M. Engels, R. Lauwereins, and J. A. Peperstraete, "Static scheduling of multi-rate and cyclo-static DSP-applications," presented at IEEE International Workshop on VLSI Signal Processing, La Jolla, California, 1994.


Hierarchical Static Scheduling of Dataflow Graphs onto Multiple Processors

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