Main Menu/Search/Help

1994

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright.
  1. E. A. Lee and D. G. Messerschmitt, Digital Communication, Second Edition, Kluwer Academic Press, Norwood, Mass, 1994.
  2. P. K. Murthy, S. S. Bhattacharyya, and E. A. Lee, ``Combined Code and Data Minimization for Synchronous Dataflow Programs,'' Memorandum No. UCB/ERL M94/93, Electronics Research Laboratory, University of California, Berkeley, CA 94720, November 29, 1994. .
  3. E. A. Lee and J. Bier, ``Multiprocessor System Having Statically Determined Resource Allocation Schedule at Compile Time and the Using a Static Schedule With Processor Signals To Control The Execution Time Dynamically'', UNITED STATES PATENT, Number 5,367,678. Date of Patent: Nov. 22, 1994
  4. J. T. Buck, ``Static Scheduling and Code Generation from Dynamic Dataflow Graphs with Integer-Valued Control Systems,'' Invited Paper, Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994.
  5. M. J. Chen and E. A. Lee, ``Design and Implementation of a Multidimensional Synchronous Dataflow Environment,'' Invited Paper, Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994.
  6. B. L. Evans and J. H. McClellan, ``Algorithms for Symbolic Linear Convolution,'' Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994, pp. 948-953.
  7. B. L. Evans, S. X. Gu, and R. H. Bamberger, ``Interactive Solution Sets as Components of Fully Electronic Signals and Systems Courseware,'' Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994, pp. 1314-1319.
  8. B. L. Evans, J. Teich, and C. Schwarz, ``Automated Design of Two-Dimensional Rational Decimation Systems,'' Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994, pp. 498-502.
  9. B. L. Evans, J. Teich, and T. A. Kalker, ``Families of Smith Form Decomposition to Simplify Multidimensional Filter Bank Design,'' Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994, pp. 363-367.
  10. P. K. Murthy and E. A. Lee, ``Optimal Blocking Factors for Blocked, Non-Overlapped Multiprocessor Schedules'', Invited Paper, Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994.
  11. J. L. Pino, T. M. Parks and E. A. Lee, ``Mapping Multiple Independent Synchronous Dataflow Graphs onto Heterogeneous Multiprocessors,'' Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, Oct. 31 - Nov. 2, 1994.
  12. S. Sriram and E. A. Lee, ``Statically Scheduling Communication Resources in Multiprocessor DSP Architectures,'' Invited Paper, Proc. of IEEE Asilomar Conf. on Signals, Systems, and Computers, Oct. 31 - Nov. 2, Pacific Grove, CA, 1994.
  13. J. Teich, S. Sriram, L. Thiele, and M. Martin, ``Performance Analysis of Mixed Asynchronous-Synchronous Systems'', Proc. of the IEEE Workshop on VLSI Signal Processing, Oct. 26 - 28, 1994, pp. 103-112. Proceedings published as IEEE VLSI Signal Processing VII
  14. A. Kalavade and E. A. Lee, ``A Global Criticality / Local Phase Driven Algorithm for the Constrained Hardware/Software Partitioning Problem,'' Proc. of Codes/CASHE 94, Third IEEE International Workshop on Hardware/Software Codesign, Grenoble, France, Sept. 22-24, 1994, pp 42-48.
  15. J. T. Buck, ``A Dynamic Dataflow Model Suitable for Efficient Mixed Hardware and Software Implementations of DSP Applications,'''' Proc. of Codes/CASHE 94, Third International Workshop on Hardware/Software Codesign, Grenoble, France, Sept. 22-24, 1994.
  16. B. L. Evans, A. Kamas, and E. A. Lee, ``Design and Simulation of Heterogeneous Systems Using Ptolemy,'' First Annual Rapid Prototyping of Application Specific Signal Processors (RASSP) Conference, Arlington, VA, Aug. 15-18, 1994, pp. 97-105.
  17. The Ptolemy Team, ``Ptolemy Seamlessly Supports Heterogeneous Design,'' RASSP Enterprise Newsletter, vol. 1, no. 3, August 1994.
  18. E. A. Lee, ``Dataflow Process Networks,'' Electronics Research Laboratory Memorandum, Tech. Report UCB/ERL M94/53, University of California, Berkeley, CA 94720, July 1994.
  19. S. S. Bhattacharyya, Compiling Dataflow Programs for Digital Signal Processing, Tech. Report UCB/ERL 94/52, Ph.D. Dissertation, Dept. of EECS, University of California, Berkeley, CA 94720, July 12, 1994.
  20. A. Kalavade and E. A. Lee, ``Manifestations of Heterogeneity in Hardware/Software Codesign,'' Proc. of IEEE Design Automation Conference, San Diego, CA, June, 1994, pp. 437-438
  21. P. K. Murthy and E. A. Lee, ``On the Optimal Blocking Factor for Blocked, Non-Overlapped Schedules,'' ERL Technical Report UCB/ERL 94/46, University of California, Berkeley, CA 94720, June 6, 1994.
  22. S.-I. Shih, ``Code Generation for VSP Software Tool in Ptolemy'', MS Report, Plan II, ERL Technical Report UCB/ERL M94/41, University of California, Berkeley, CA 94720, May 25, 1994.
  23. M. J. Chen, ``Developing a Multidimensional Synchronous Dataflow Domain in Ptolemy,'' MS Report, ERL Technical Report UCB/ERL No. 94/16, University of California, Berkeley, CA 94720, May 6, 1994.
  24. S. S. Bhattacharyya and E. A. Lee, ``Memory Management for Dataflow Programming of Multirate Signal Processing Algorithms,'' IEEE Trans. on Signal Processing, vol. 42, no. 5, May 1994.
  25. S. S. Bhattacharyya and E. A. Lee, ``Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms,'' Formal Methods in System Design, No. 5, No. 3, December, 1994. (updated from UCB/ERL Technical Report, May 21, 1993).
  26. B. L. Evans, T. R. Gardos, and J. H. McClellan, ``Imposing Structure on Smith Form Decompositions of Rational Resampling Matrices'', IEEE Trans. on Signal Processing, vol. 42, no. 4, pp. 970-973, April, 1994.
  27. B. L. Evans, R. H. Bamberger, and J. H. McClellan, ``Rules for Multidimensional Multirate Structures'', IEEE Trans. on Signal Processing, vol. 42, no. 4, pp. 762-771, April, 1994.
  28. B. L. Evans and F. A. Sakarya, ``Interactive Graphical Design of Two- Dimensional Compression Systems'', Proc. of Second National Workshop on Signal Processing, pp. 173-178, Marmaris, Turkey, April, 1994.
  29. E. A. Lee, ``Computing and Signal Processing: An Experimental Multidisciplinary Course'', Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. VI, pp. 45-48, Adelaide, Australia, April, 1994.
  30. P. K. Murthy, S. S. Bhattacharyya, and E. A. Lee, ``Minimizing Memory Requirements For Chain-Structured Synchronous Dataflow Programs,'' Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. II, pp. 453-456, Adelaide, Australia, April, 1994.
  31. J. L. Pino, T. M. Parks, and E. A. Lee, ``Automatic Code Generation for Heterogeneous Multiprocessors,'' Proc. of IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. II, pp. 445-448, Adelaide, Australia, April, 1994.
  32. J. T. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, ``Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems,'' Int. Journal of Computer Simulation, special issue on ``Simulation Software Development,'' vol. 4, pp. 155-182, April, 1994. .
  33. A. Peevers, A Real-Time 3D Signal Analysis/Synthesis Tool Based on the Overlap-Add Short-Time Fourier Transform, MS Report, Plan II, University of California, Berkeley, CA 94720, February 24, 1994.
  34. A. Lao, ``Heterogeneous Cell-Relay Network Simulation and Performance Analysis with Ptolemy,'' Memorandum No. UCB/ERL M94/8, Electronics Research Laboratory, College of Engineering, University of California, Berkeley, CA 94720, February 17, 1994.

Created Mon Feb 22 14:12:22 1999
Send comments to www@ptolemy.eecs.berkeley.edu