BOSTON-October 24, 1995-The Alta Group of Cadence Design Systems today announced at the 1995 DSP World Expo and Conference its CONVERGENCE* Simulation Architecture, a new, state-of-the-art technology foundation for Alta Group's leading electronic system design automation (ESDA) offering, SPW* (Signal Processing WorkSystem). The new CONVERGENCE Simulation Architecture was developed to address two trends in the industry: 1) the convergence of system-level design and chip- level design (due to the evolution towards systems on a chip), and 2) the convergence of communications and multimedia application domains.
The CONVERGENCE Simulation Architecture enables, for the first time, full-system, mixed-level and mixed-domain simulation, enabling continuous analysis and verification of the increasingly complex convergence designs from concept to implementation. Users will benefit by dramatically increased confidence in first-time systems success and dramatically shorter, more predictable design cycles (with fewer iterations).
The new simulation architecture is based on research from the renowned Ptolemy research project at the University of California at Berkeley. The Ptolemy research project, which began in January 1990, is a system-level design framework that allows mixing of multiple models of computation. Alta Group consulted with Dr. Edward A. Lee, professor at U. C. Berkeley's College of Engineering and director of the Ptolemy project, and utilized the Ptolemy team's results to uniquely implement Ptolemy's advanced simulation algorithms in Alta Group's leading SPW solution.
"The technology breakthrough in the area of mixed-level simulation algorithms has enabled Alta Group to deliver the first step in realizing full- system, multi-level simulation," said Dr. Lee. "As the complexity of designs increases, so does the need to validate designs at multiple levels of abstraction. This requires that simulations interact across levels. The new algorithms and technology that were developed in the Ptolemy project and applied by Alta Group will pave the way for continued advancements in the area of heterogeneous system simulation."
According to Baruch Deutsch, director of product marketing, Alta Group, "The CONVERGENCE Simulation Architecture represents a significant milestone on Alta Group's multi-year technology roadmap. This new technology foundation positions Alta Group for another decade of leadership in systems and systems-on-a-chip design in the highest growth convergence applications."
Within the dataflow modeling paradigm, the CONVERGENCE Simulation Architecture uniquely supports a combination of synchronous dataflow (SDF) models and dynamic dataflow (DDF) models. DDF is applicable to the general case of variable-rate signal processing systems, which has evolved to be a critical element in today's communications applications. SDF is applicable to fixed-rate signal processing and can take advantage of "static scheduling" techniques, which offer significant simulation performance advantages.
As the design is refined, the CONVERGENCE Simulation Architecture uniquely supports built-in, fixed-point attributes to rapidly model limited precision effects and a new, upgraded modeling foundation for mixing in detailed micro-architecture and processor models. To support these detailed models, the CONVERGENCE Simulation Architecture supports the modeling of multiple clocks, asynchronous resets and gated clocks, all of which are critical for real-world hardware and cycle- and phase-accurate processor modeling. To provide interoperability with HDL environments, the CONVERGENCE Simulation Architecture also supports interfaces to leading VHDL and Verilog simulators. The ability to mix algorithm, limited precision and real-world clocked models in a single simulation environment is unique in the industry and critical to ensure that hardware and software architectures are verified in the context of the target system and complex environment.
Finally, the CONVERGENCE Simulation Architecture supports a co- simulation link to Alta Group's BONeS( DESIGNER* product, the industry-leading, block-oriented network simulator that is particularly useful for modeling the network environment that new convergence designs must operate in. The combination of SPW, with the CONVERGENCE Simulation Architecture, and BONeS allows users to model a complete system, including the components to be designed (e.g., set-top box or cellular phone), and the network at both the physical and network layers.
Alta Group is the leading supplier of system-level software tools, libraries and services for the design electronics systems. The company's products are focused on the early, high-level portion of the design cycle where fundamental design decisions are made. Products of this type are classified as electronic system design automation (ESDA). Alta Group's target customers include electronic systems and semiconductor companies that design wireless communications, multimedia and networking products.
Alta Group, SPW, DESIGNER and CONVERGENCE are trademarks of Alta Group. The Signal Processing WorkSystem and BONeS are registered trademarks of Alta Group. All other trademarks or registered trademarks are the property of their respective owners.
For more information, contact Diane Orr at Tsantes & Associates, 408/452-8700, email@example.com.