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PUBLICATIONS of the DSP DESIGN GROUP and the PTOLEMY PROJECT

Heuristics for Joint Code and Data Minimization in SDF Programs

Keywords: Dataflow, Synchronous dataflow, code generation for multiprocessor DSPs, graphical programming environments, block diagram languages, compilers for DSPs, optimizing memory requirements for DSPs, tools for rapid prototyping.

ABSTRACT

Dataflow has proven to be an attractive computational model for graphical DSP design environments that support the automatic conversion of hierarchical signal flow diagrams into implementations on programmable processors. The synchronous dataflow (SDF) model is particularly well-suited to dataflow- based graphical programming because its restricted semantics offer strong formal properties and significant compile-time predictability, while capturing the behavior of a large class of important signal processing applications. When synthesizing software for embedded signal processing applications, critical constraints arise due to the limited amounts of memory. In the following papers, we propose a solution to the problem of jointly optimizing the code and data size when converting SDF programs into software implementations. The abstracts for the individual papers describe the specific techniques developed in each paper.