1996 Research Summaries for the Ptolemy Project

Research advisor: Edward A. Lee

These research summaries give a snapshot of many of the research efforts within the Ptolemy Project. These summaries appear in Chapter 2 "Computer-Aided Design", Chapter 10 "Communications and Signal Processing", and Chapter 21 "Parallel Architectures, Languages, and Applications" of the EECS/ERL 1996 Research Summary book. The research summary is published once a year by the Industrial Liaison Program, Electrical Engineering and Computer Sciences Department, and the Electronics Research Laboratory of the University of California at Berkeley, California. The Industrial Liaison Program office can be reached at +1-510-643-6691 or ilp@eecs.berkeley.edu

ResearcherProject Title
Wan-Teh Chang
Bilung Lee
Specification of Control Flow in Ptolemy
William ChenDesigning Two-Dimensional Filter Banks Based on Geometric Decompositions of the Frequency Domain
Stephen A. EdwardsHierarchical Nesting of Esterel Modules in Dataflow Graphs
Dr. Brian L. EvansInteroperability of Special-Purpose Tools with Ptolemy
Dr. Brian L. EvansElectronic Courseware for Signal Processing
Geroncio G. GaliciaDesign Assistant for Heterogeneous Systems
Michael GoodwinModeling of Residuals in Music Analysis-Synthesis
Joel R. KingMixed-Signal Simulation in the Ptolemy Environment
Dr. Yoshio MikiControl Logic Generation for Performance Estimation of High-Performance Pipelines
Dr. Takashi MiyazakiDSP-Based System Design in the Ptolemy Environment
Praveen K. Murthy
Dr. Shuvra S. Bhattacharyya
Joint Minimization of Code and Data for Multirate Synchronous Dataflow Programs
Praveen K. MurthyGeneralized Multidimensional Synchronous Dataflow
José Luis PinoCode Generation for Heterogeneous Multiprocessors
José Luis PinoHierarchical Static Scheduling of Dataflow Graphs onto Multiple Processors
José Luis PinoInterface Synthesis in Heterogeneous System-Level DSP Design Tools
Farhana SheikhA Hierarchical Algorithm Specification and Test Environment for Video Signal Processing Architectures
Farhana Sheikh
Patrick Warner
Ptolemy C Code Generation and Scheduling for the Network of Workstations (NOW)
Gitanjali M. Swamy
Stephen A. Edwards
Netlist Comparison for Incremental Verification
Patrick WarnerParallel systems and simulations in Ptolemy
Michael C. WilliamsonDSP System Design through VHDL in the Ptolemy Environment

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