Mapping Multiple Independent Synchronous Dataflow Graphs

References

[2] E.A. Lee and S. Ha, "Scheduling strategies for multiprocessor real-time DSP.," GLOBECOM '89, 1989, p. 1279-83 vol.2.

[3] D.G. Powell, E. A.Lee, and W.C. Newman, "Direct Synthesis of Optimized DSP Assembly Code from Signal Flow Block Diagrams," ICASSP, vol. 5, San Francisco, CA, IEEE, 1992, p. 553-556.

[4] S. Ritz, M. Pankert, and H. Meyr, "High level software synthesis for signal processing systems," Proceedings of the International Conference on Application Specific Array Processors, Berkeley, CA, USA, IEEE Comput. Soc. Press, 1992, p. 679-693.

[5] E.A. Lee and D.G. Messerschmitt, "Synchronous data flow," Proceedings of the IEEE, vol. 75, no. 9, 1987, p. 1235-1245.

[6] J.L. Pino, S. Ha, E.A. Lee, and J.T. Buck, "Software Synthesis for DSP Using Ptolemy," Journal of VLSI Signal Processing, Synthesis for DSP, 1994, to appear.

[7] J.L. Pino, Software Synthesis for Single-Processor DSP Systems Using Ptolemy, Master's Thesis Memorandum UCB/ERL M93/35, University of California at Berkeley, 1993.

[8] S. Sriram and E.A. Lee, "Design and Implementation of an Ordered Memory Access Architecture," ICASSP, Minneapolis, MN, IEEE, 1993.

[9] C.L. Liu and J.W. Layland, "Scheduling algorithms for multiprogramming in a hard-real-time environment," Journal of the Association for Computing Machinery, vol. 20, no 1., 1973, p. 46-61.

[10] I. Kuroda and T. Nishitani, "Asynchronous Multirate System Design for Programmable DSPs," ICASSP, vol 5, San Francisco, CA, IEEE, 1992, p 549-552.

[11] T. M. Parks, E. A. Lee, "Non-Preemptive Real-Time Scheduling of Dataflow Systems," submitted to ICASSP, Detroit, MI, IEEE, 1995.

[12] J. L. Pino, E. A. Lee, "Hierarchical Static Scheduling of Dataflow Graphs onto Multiple Processors," submitted to ICASSP, Detroit, MI, IEEE, 1995.

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