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1996

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  1. S. S. Bhattacharyya, P. K. Murthy and E. A. Lee, ``Software Synthesis from Dataflow Graphs'', Kluwer Academic Publishers, Norwell, Mass, 1996.
  2. P. K. Murthy, Scheduling Techniques for Synchronous and Multidimensional Synchronous Dataflow, Technical Report UCB/ERL M96/79, Ph.D. Dissertation, EECS Department, University of California, Berkeley, CA 94720, December 1996.
  3. E. A. Lee, and A.Sangiovanni-Vincentelli, ``Comparing Models of Computation,'' Proc. of ICCAD, San Jose, CA, Nov. 10-14, 1996.
  4. A. Kalavade and E. A. Lee, ``Complexity Management in System-Level Design,'' Journal of VLSI Signal Processing Systems, Vol. 14, No. 2, November 1996.
  5. William Chen, H. John Reekie, Sunil Bhave, and Edward A. Lee, ``Native Signal Processing on the UltraSparc in the Ptolemy Environment,'' Proc. of the 30th Annual Asilomar Conference on Signals, Systems, and Computers, November 1996.
  6. S. S. Bhattacharyya, S. Sriram, and E. A. Lee, ``Resynchronization of Multiprocessor Schedules: Part 1 -- Fundamental Concepts and Unbounded-latency Analysis,'' Memorandum UCB/ERL M96/55, Electronics Research Laboratory, U. C. Berkeley, October, 1996.
  7. S. S. Bhattacharyya, S. Sriram, and E. A. Lee, ``Resynchronization of Multiprocessor Schedules: Part 2 -- Latency-constrained Resynchronization,'' Memorandum UCB/ERL M96/56, Electronics Research Laboratory, U. C. Berkeley, October, 1996.
  8. F.Sheikh, ``Visualizing Architecture and Algorithm Interaction in Embedded Systems,'' MS Thesis, EECS Department, University of California. Berkeley, CA 94720, September 17, 1996.
  9. S. S. Bhattacharyya, S. Sriram, and E. A. Lee, ``Latency-Constrained Resynchronization for Multiprocessor DSP Implementation,'' Proc. ASAP Conference, Chicago, August 19-21, 1996.
  10. R. Mani, H. S. Nawab, J. M. Winograd, and B. L. Evans, ``Integrated numeric and symbolic signal processing in a heterogeneous design environment,'' Proc. SPIE Int. Sym. on Advanced Signal Processing Algorithms, Architectures, and Implementations, Denver, CO, August 12-15, 1996.
  11. R. The Ptolemy Team, ``System-Level Design Methodology for Embedded Signal Processors,'' RASSP Digest Newsletter, July, 1996.
  12. J. R. Barry, E. A. Lee, and D. G. Messerschmitt, ``Capacity Penalty Due to Ideal Zero-Forcing Decision-Feedback Equalization,'' IEEE Trans. on Information Theory.Vol. 42, No. 4, pp. 1062-1071, July 1996.
  13. E. A. Lee and A. Sangiovanni-Vincentelli, ``The Tagged Signal Model --A Preliminary Version of a Denotational Framework for Comparing Models of Computation,'' ERL Memorandum UCB/ERL M96/33, University of California, Berkeley, CA 94720, June 4, 1996.
  14. B. Lee, ``Fusing Dataflow with Finite State Machines,'' Memorandum UCB/ERL M96/20, Electronics Research Laboratory, University of California, Berkeley, CA 94720, May 1996.
  15. S. S. Bhattacharyya, S. Sriram, and E. A. Lee, ``Self-Timed Resynchronization: A Post-Optimization for Static Multiprocessor Schedules,'' Proc. IPPS, April 1996.
  16. K. Chiang, B. L. Evans, W. T. Huang, F. Covet, E. A. Lee, H. J. Reeky, D. G. Messerschmitt, and S. Sister, ``Real-Time DSP for Sophomores,'' in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Atlanta, GA, May 7-10, 1996, vol. 2, pp. 1097-1100.
  17. P. K. Murthy and E. A. Lee, ``An Extension of Multidimensional Synchronous Dataflow to Handle Arbitrary Sampling Lattices,'' in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Atlanta, GA, May 7-10, 1996, vol. 6, pp. 3306-3309.
  18. J. L. Pino, M. C. Williamson, and E. A. Lee, ``Interface Synthesis in Heterogeneous System-Level DSP Design Tools,'' in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Atlanta, GA, May 7-10, 1996, vol. 2, pp. 1268-1271.
  19. G. Arslan, B. L. Evans, F. A. Sakarya, and J. L. Pino, ``Performance Evaluation and Real-Time Implementation of Subspace, Adaptive, and DFT Algorithms for Multi-Tone Detection,'' Proc. Int. Conf. on Telecommunications, Istanbul, Turkey, April 15-17, 1996.
Created Mon Feb 22 14:12:22 1999
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