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PUBLICATIONS of the DSP DESIGN GROUP and the PTOLEMY PROJECT
Code Generation for VSP software tool in Ptolemy
Sun-Inn Shih
MS Report (Plan II)
May 17, 1994
Abstract
In this project we extend the Ptolemy system developed in UCB to incorporate a program-mable,
extendable video processing chip called VSP. It allows rapid prototyping and evaluation
for real time video applications. Currently, the software package that comes with the VSP chips
includes a graphic editor, simulators, a code generator, a scheduler, and other related tools. A
video algorithm is designed in the graphic editor and mapped to the hardware. The graphic editor
uses signal flow graph (SFG) semantics where an algorithm is represented by nodes and arcs. A
node represents a function chosen from a limited set of functions provided by the VSP package.
An arc between two nodes represents data transfer between the nodes. The code generator in the
VSP package generates the micro code for an algorithm specified by a SFG graph.
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Send comments to Sun-Inn Shih at shih@eecs.berkeley.edu.